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INTEGRATED CIRCUITS
DATA SHEET
TZA3030 SDH/SONET STM1/OC3 optical receiver
Objective specification File under Integrated Circuits, IC19 1998 Aug 24
Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
FEATURES * Low equivalent input noise, typically 1 pA/Hz * Wide dynamic range, typically 0.5 A to 2 mA * On-chip low-pass filter. The bandwidth can be varied between 90 and 150 MHz using an external resistor. Default value is 120 MHz. * Differential transimpedance of 1.8 M * On-chip Automatic Gain Control (AGC) * Positive Emitter Coupled Logic (PECL) or Current-Mode Logic (CML) compatible data outputs * LOS (Loss Of Signal) detection * LOS threshold level can be adjusted using a single external resistor * On-chip DC offset compensation * Single supply voltage from 3.0 to 5.5 V * Bias voltage for PIN diode. ORDERING INFORMATION TYPE NUMBER TZA3030HL TZA3030U PACKAGE NAME LQFP32 - DESCRIPTION plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm naked die in waffle pack carriers; die dimensions 1.58 x 1.58 mm APPLICATIONS
TZA3030
* Digital fibre optic receiver in short, medium and long haul optical telecommunications transmission systems or in high speed data networks * Wideband RF gain block. GENERAL DESCRIPTION The TZA3030 optical receiver is a low-noise transimpedance amplifier with AGC plus a limiting amplifier designed to be used in SDH/SONET fibre optic links. The TZA3030 amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and converts it to a differential output voltage.
VERSION SOT401-1 -
1998 Aug 24
2
Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
BLOCK DIAGRAM
TZA3030
handbook, full pagewidth
VCCA 2 2, 5
AGC
VCCD 2
31
17, 20
LOS DETECTION
TTL
29 28
LOSTH LOSTTL
PECL PEAK DETECTOR 2 k GAIN CONTROL
26 27
LOS LOSQ
DREF
4
65 pF CML IPhoto 1 nF 7 A1 A2 15 PECL 22 23 OUTSEL OUTPECL OUTQPECL 18 19 OUTCML OUTQCML
PREAMPLIFIER
LIMITING AMPLIFIER
DC OFFSET COMPENSATION TESTING 12 1, 3, 6, 8 9, 30, 32 7 SUB AGND RFTEST Vref BWC 14 BIASING 11 10
TZA3030
13, 16, 21 24, 25 5 DGND
MBK857
Fig.1 Block diagram.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
PINNING SYMBOL AGND VCCA AGND DREF VCCA AGND IPhoto AGND AGND BWC PIN 1 2 3 4 5 6 7 8 9 10 TYPE ground supply ground supply ground analog input ground ground analog input analog ground analog supply voltage analog ground analog supply voltage analog ground DESCRIPTION
TZA3030
analog output bias voltage for PIN diode (VCCA); cathode should be connected to this pin
current input; connect the anode of PIN diode to this pin; DC bias level is 1048 mV analog ground analog ground bandwidth control pin; default bandwidth is 120 MHz; a resistor should be connected between Vref (pin 11) and BWC (pin 10) to decrease bandwidth, or between BWC (pin 10) and AGND to increase bandwidth substrate pin; to be connected to AGND digital ground test pin; not connected; not used in application output select pin; when OUTSEL is HIGH, CML data outputs are active and PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected, PECL data outputs will then be active and CML data outputs disabled digital ground digital supply voltage CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7) CML compliment of OUTCML (pin 18) digital supply voltage digital ground PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7) PECL compliment of OUTPECL (pin 22) digital ground digital ground PECL-compatible LOS detection pin; LOS output is HIGH when the input signal is below the user programmable threshold level PECL compliment of LOS (pin 26) CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the input signal is below the user programmable threshold level pin for setting input threshold level; nominal DC voltage is VCCA - 1.5 V; threshold level set by connecting an external resistor between LOSTH and VCCA or by forcing a current into LOSTH; default value for this resistor is 400 k analog ground AGC monitor voltage; the internal AGC circuit can be disabled by applying an external voltage to this pin analog ground 4
Vref SUB DGND RFTEST OUTSEL
11 12 13 14 15
analog output band gap reference voltage; nominal value approximately 1.2 V substrate ground analog input CMOS input
DGND VCCD OUTCML OUTQCML VCCD DGND OUTPECL OUTQPECL DGND DGND LOS LOSQ LOSTTL LOSTH
16 17 18 19 20 21 22 23 24 25 26 27 28 29
ground supply CML output CML output supply ground PECL output PECL output ground ground PECL output PECL output TTL output analog I/O
AGND AGC AGND 1998 Aug 24
30 31 32
ground analog I/O ground
Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
TZA3030
29 LOSTH
25 DGND
30 AGND
32 AGND
27 LOSQ
handbook, full pagewidth
28 LOSTTL
31 AGC
26 LOS
AGND VCCA AGND DREF VCCA AGND IPhoto AGND
1 2 3 4
24 DGND 23 OUTQPECL 22 OUTPECL 21 DGND
TZA3030HL
5 6 7 8 20 VCCD 19 OUTQCML 18 OUTCML 17 VCCD
BWC 10
Vref 11
SUB 12
DGND 13
RFTEST 14
OUTSEL 15
DGND 16
AGND
9
MBK856
Fig.2 Pin configuration.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
CHIP DIMENSIONS AND BONDING PAD LOCATIONS COORDINATES(1) SYMBOL AGND VCCA AGND DREF VCCA AGND IPhoto AGND AGND BWC Vref SUB DGND RFTEST OUTSEL DGND VCCD OUTCML PAD x 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 102 102 102 102 102 102 102 102 243 383 523 663 803 943 1100 1257 1398 1398 y 1251 1111 971 814 674 534 395 254 105 105 105 105 105 105 105 105 263 403 OUTQCML VCCD DGND OUTPECL OUTQPECL DGND DGND LOS LOSQ LOSTTL LOSTH AGND AGC AGND Note 19 20 21 22 23 24 25 26 27 28 29 30 31 32
TZA3030
COORDINATES(1) SYMBOL PAD x 1398 1398 1398 1398 1398 1398 1283 1143 986 829 671 514 357 217 y 543 683 823 963 1103 1243 1400 1400 1400 1400 1400 1400 1400 1400
1. All coordinates (m) are measured with respect to the bottom left-hand corner of the die.
LOSTH
32 AGND VCCA AGND 1.58 mm DREF VCCA AGND IPhoto AGND 1 2 3 4 5 6 7 8 9 AGND x 0 0 y
31
30
29
28
27
26
25 24 23 22 DGND OUTQPECL OUTPECL DGND VCCD OUTQCML OUTCML VCCD
DGND 21 20 19 18 17 16 DGND
AGND
AGND
LOSQ 14 RFTEST
handbook, full pagewidth
LOSTTL
AGC
TZA3030U
10 BWC
11 Vref
12 SUB
13 DGND
15 OUTSEL
LOS
1.58 mm
MBK858
Fig.3 Bonding pad locations of TZA3030U.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
FUNCTIONAL DESCRIPTION The TZA3030 contains five functional blocks: * Preamplifier input stage * Low-pass filter * Limiting amplifier stage * Offset compensation loop * Loss of signal detection unit. Preamplifier The preamplifier provides low-noise amplification of the current generated by a photodiode connected to pin IPhoto. A differential amplifier converts the output of the preamplifier to a differential voltage. An AGC loop increases the dynamic range of the receiver by reducing the feedback resistance of the preamplifier. The AGC loop hold capacitor is integrated on-chip, so an external capacitor is not needed for AGC. The AGC voltage can be monitored at pin AGC. This pin can be left unconnected for normal operation. It can also be used to force an external AGC voltage. If pin AGC is connected to VCCA, the internal AGC loop is disabled and the receiver gain is at a maximum. In this case, the maximum input current is approximately 10 A. Low-pass filter A low-pass filter controls the bandwidth of the receiver, which can be varied between 90 and 150 MHz. The bandwidth is set to 120 MHz by default. It can be decreased by connecting a resistor between pin BWC and pin Vref or increased by connecting a resistor between pin BWC and AGND. Limiting amplifier
TZA3030
A limiting amplifier boosts the signal up to PECL levels. The output can be either CML or PECL compatible, selected by means of pin OUTSEL. When OUTSEL is HIGH, the CML data outputs are active and the PECL data outputs are disabled. If OUTSEL is left unconnected, it is pulled LOW and the PECL data outputs are active while the CML data outputs are disabled. The logic level symbol definitions for CML and PECL are shown in Fig.4. The CML and PECL output circuits are given in Fig.5. Offset compensation loop A control loop connected between the limiting amplifier output and the differential amplifier input cancels the DC offset. The loop bandwidth is fixed internally at 30 kHz. Loss Of Signal (LOS) detection The LOS section detects an input signal level below a fixed threshold. The threshold is determined by the current through pin LOSTH. If this current is increased, the threshold level will rise. An external resistor connected between pin LOSTH and VCCA can be used, or a current can be forced into pin LOSTH. The default value for the external resistor is 400 k. In this case, the current through pin LOSTH will be approximately 3.75 A since the voltage at pin LOSTH is regulated at 1.5 V below the supply voltage. This threshold corresponds to an input current of 208 nA. The ratio of LOSTH current to input current is thus approximately 18 : 1. When the input signal level falls below this threshold, the LOS (PECL compatible) and LOSTTL (TTL compatible) outputs go HIGH. The hysteresis is fixed internally at 3 dB. Response time is typically less than 20 s.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
TZA3030
handbook, full pagewidth
VCC VO(max) VOQH VOH Vo(p-p) VOQL VOL VO(min) VOO
MGR243
Fig.4 Logic level symbol definitions for CML and PECL.
V handbook, full pagewidthCC 100 OUTCML 100 OUTQCML
VCC 105 105
OUTPECL OUTQPECL 0.5 mA 6 mA 9 mA 0.5 mA
MGK886
a. CML.
b. PECL.
Fig.5 Output circuits.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC Vn supply voltage DC voltage pin 7: IPhoto pin 14: RFTEST pins 18 and 19: OUTCML and OUTQCML pin 29: LOSTH pin 10: BWC pin 31: AGC pin 11: Vref pin 4: DREF pin 15: OUTSEL pin 28: LOSTTL In DC current pin 7: IPhoto pin 14: RFTEST pins 18 and 19: OUTCML and OUTQCML pin 29: LOSTH pin 10: BWC pin 31: AGC pin 11: Vref pin 4: DREF pin 15: OUTSEL pin 28: LOSTTL Ptot Tstg Tj Tamb total power dissipation storage temperature junction temperature operating ambient temperature -2.5 -2 -15 -2 -1 -0.2 -2 -2.5 -0.5 -16 - -65 - -40 +2.5 +2 +10 +15 +2 +1 +0.2 +2.5 +2.5 +0.5 +16 600 +150 150 +85 -0.5 -0.5 VCC - 2 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 +2 PARAMETER MIN. -0.5
TZA3030
MAX. +6 V V
UNIT
VCC + 0.5 V VCC + 0.5 V VCC + 0.5 V VCC + 0.5 V +3.2 +3.2 V V VCC + 0.5 V VCC + 0.5 V VCC + 0.5 V VCC + 0.5 V mA mA mA mA mA mA mA mA mA mA mA mW C C C
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ VCC - 2
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ -25
THERMAL CHARACTERISTICS SYMBOL Rth(j-s) Rth(j-a) PARAMETER thermal resistance from junction to solder point thermal resistance from junction to ambient VALUE tbf tbf UNIT K/W K/W
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
TZA3030
CHARACTERISTICS For typical values Tamb = 25 C and VCC = 5 V; minimum and maximum values are valid over the entire ambient temperature range and process spread. SYMBOL VCC ICCD PARAMETER supply voltage digital supply current note 1 note 2 note 3 ICCA Ptot Tj Tamb Rtr analog supply current total power dissipation junction temperature operating ambient temperature small-signal transresistance of the receiver high frequency -3 dB point low frequency -3 dB point total integrated RMS noise current over bandwidth referenced to input; Ci = 1.2 pF; note 5 f = 90 MHz f = 120 MHz f = 155 MHz PSRR power supply rejection ratio measured differentially; note 6 f = 100 kHz to 10 MHz Rtr/t AGC loop constant - - 0.5 10 1 - A/V A/V dB/ms f = 10 MHz to 100 MHz - Input: IPhoto Vbias(IPhoto) input bias voltage Ii(IPhoto)(p-p) input current (peak-to-peak value) VCC = 5 V VCC = 3.3 V 50 to VCC - 2 V 50 to VCC - 2 V measured differentially 20% to 80% 80% to 20% tbf -2000 -1000 1048 +1 +1 tbf +2000 +1000 VCC - 900 +10 tbf tbf mV A A - - - 16 tbf tbf - - - nA nA nA measured differentially PECL outputs CML outputs f-3dB(h) f-3dB(l) In(tot) pin BWC left unconnected; note 4 - - - 20 2000 1000 120 30 - - - 40 k k MHz kHz CONDITIONS 3 13 - 11 24 - -40 -40 MIN. 5 20 47 17 36 - - +25 TYP. 5.5 28 - 24 51 525 +110 +85 MAX. UNIT V mA mA mA mA mW C C
PECL outputs: OUTPECL and OUTQPECL VOH VOL VOO tr tf HIGH-level output voltage LOW-level output voltage output offset voltage rise time fall time VCC - 1100 - VCC - 1840 - -10 - - - tbf tbf mV mV ps ps VCC - 1620 mV
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
TZA3030
SYMBOL
PARAMETER
CONDITIONS 50 to VCC - 2 V 50 to VCC - 2 V measured differentially 20% to 80% 80% to 20%
MIN. VCC - 1100 - VCC - 1840 - -10 - - VCC - 260 150 -10 80 - - - - - -
TYP.
MAX. VCC - 900 +10 600 200
UNIT
PECL outputs: LOS and LOSQ VOH VOL VOO tr tf VO Vo(se)(p-p) VOO Ro tr tf HIGH-level output voltage LOW-level output voltage output offset voltage rise time fall time mV mV ns ns VCC - 1620 mV
CML outputs: OUTCML and OUTQCML output voltage output voltage single-ended (peak-to-peak value) output offset voltage output resistance rise time fall time measured single-ended; 50 to VCC 50 to VCC measured differentially; 50 to VCC measured single-ended 20% to 80%; RL = 50 ; CL = 1 pF 80% to 20%; RL = 50 ; CL = 1 pF VCC 260 +10 120 - - mV mV mV ps ps
200 - 100 tbf tbf
CMOS input: OUTSEL VIL VIH VOL VOH Notes 1. OUTPECL, OUTQPECL, OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. OUTPECL and OUTQPECL outputs are active. 2. OUTPECL and OUTQPECL outputs are terminated with 50 to VT. VT is an external termination voltage for PECL outputs and is 2 V below the supply voltage. OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. 3. OUTCML and OUTQCML outputs are terminated with 50 to VCCD; CML outputs are active. OUTPECL, OUTQPECL, LOS and LOSQ outputs are left unconnected. 4. The bandwidth is set to 120 MHz by default. It can be varied between 90 and 150 MHz by adjusting the voltage at pin BWC. 5. All In(tot) measurements were made with an input capacitance of Ci = 1.2 pF. This was comprised of 0.7 pF for the photodiode itself, with 0.3 pF allowed for the PCB layout and 0.2 pF intrinsic to the package. 6. PSRR is defined as the ratio of the equivalent current change at the input (IIPhoto) to a change in supply voltage: I IPhoto PSRR = ------------------V CC For example, a 4 mV disturbance on VCCat 10 MHz will typically generate the equivalent of 2 nA extra photodiode current. LOW-level input voltage HIGH-level input voltage - VCC - 1 0 VCC - 0.2 0.4 0.8 V V VCC - 0.5 - - - 0.2 VCC
CMOS output: LOSTTL LOW-level output voltage HIGH-level output voltage V V
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
APPLICATION INFORMATION
VCC 10 H 680 nF 10 H
TZA3030
handbook, full pagewidth
22 nF 2 VCCA 2, 5 1 nF DREF 29
400 k LOSTH
22 nF 2 VCCD 17, 20 27 26 28 LOSQ LOS LOSTTL OUTQPECL OUTPECL OUTQCML OUTCML Zo = 50 R2 R2 Zo = 50 R1 R1
4 23
TZA3030
IPhoto 7
22 19
12
1, 3, 6, 8 9, 30, 32 SUB AGND 7
31 AGC
10 BWC
14
11
15
13, 16, 21 18 24, 25 DGND 5
RFTEST Vref
OUTSEL
MBK859
Fig.6 Application diagram: PECL data outputs active.
handbook, full pagewidth
VCC 10 H 680 nF 10 H
22 nF 2 VCCA 2, 5 1 nF DREF 29
400 k LOSTH
22 nF 2 VCCD 17, 20 27 26 28 LOSQ LOS LOSTTL OUTQPECL OUTPECL OUTQCML OUTCML Zo = 50 Zo = 50 R1 R1
4 23
TZA3030
IPhoto 7
22 19
12
1, 3, 6, 8 9, 30, 32 SUB AGND 7
31 AGC
10 BWC
14
11
15
13, 16, 21 18 24, 25 DGND 5
RFTEST Vref
OUTSEL
MBK860
Fig.7 Application diagram: CML data outputs active.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
PECL outputs: OUTPECL, OUTQPECL, LOS and LOSQ PECL outputs can be terminated in different ways depending on the power supply voltage (see Fig.8).
TZA3030
handbook, full pagewidth
VCC = 3.3 V R1 = 127 VIQ VI VOQ R1 = 127
VO R2 = 82.5 R2 = 82.5
GND
VCC = 5 V R1 = 83.3 VIQ VI VOQ R1 = 83.3
VO R2 = 125 R2 = 125
GND
MGK887
Fig.8 PECL termination schemes.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
CML outputs: OUTCML and OUTQCML The output impedance of the CML output driver is 100 (see Fig.9) which doesn't match the characteristic impedance of the strip line. While this means that the reflections of some incident edges will arrive at the driver output on the PCB, this value was selected to reduce power dissipation inside the IC. The parallel combination of 100 and 50 (33 ) will generate a signal swing of 200 mV (peak-to-peak value, single-sided) with a tail current of 6 mA.
TZA3030
If the output impedance was 50 rather than 100 , an 8 mA tail current would be needed to generate the same voltage swing. This would increase power dissipation by 33%. If necessary, the output impedance of the generator can be matched to the line impedance by connecting an external 100 resistor in parallel with the output as shown in Fig.10. The magnitude of the output voltage swing will not change due to adaptive regulation. However, power dissipation will increase by 33%.
handbook, full pagewidth
generator inside TZA3030
interconnect PCB
receiver inside TZA3004 VCC
VCC
100
100
VO
Zo = 50
VI
50
Zo = 50 VOQ VIQ
50
MBK861
Fig.9 CML interface circuit without matched impedance; low power dissipation.
handbook, full pagewidth
generator inside TZA3030
interconnect PCB
receiver inside TZA3004 VCC
VCC
100
100
100 VO
100
Zo = 50
VI
50
Zo = 50 VOQ VIQ
50
MBK862
Fig.10 CML interface circuit with matched impedance; high power dissipation.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
PACKAGE OUTLINE LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
TZA3030
SOT401-1
c y X
24 25
17 16 ZE
A
e E HE wM bp 32 1 8 9 L detail X Lp A A2 A1 pin 1 index (A 3)
e bp D HD
ZD wM B
vM A
vM B
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.60 A1 0.15 0.05 A2 1.5 1.3 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 5.1 4.9 E (1) 5.1 4.9 e 0.5 HD 7.15 6.85 HE 7.15 6.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 0.95 0.55 0.95 0.55 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT401-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-12-19 97-08-04
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all LQFP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. Wave soldering Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all LQFP packages with a pitch (e) equal or less than 0.5 mm.
TZA3030
If wave soldering cannot be avoided, for LQFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TZA3030
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
NOTES
TZA3030
1998 Aug 24
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Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
NOTES
TZA3030
1998 Aug 24
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
425102/200/01/pp20
Date of release: 1998 Aug 24
Document order number:
9397 750 04069

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